1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More particularly, the present invention relates to a method of manufacturing a charge storage device.
2. Description of the Related Art
As the techniques for manufacturing deep sub-micron semiconductor devices start to mature, the size of each device is reduced correspondingly. Hence, for a dynamic random access memory, the area assigned to each memory cell for disposing the capacitor has become smaller and smaller. On the other hand, with the increasing demand for a larger storage space for computer application software, memory with an ever-increasing storage capacity is required. As the conflicting demands for a smaller device dimension but a higher memory storage capacity continue, a modification of the existing method of fabricating the dynamic random access memory is urgently needed before all the constraints dictated by the trend can be met.
In general, a number of ways is available for increasing the charge storage capacity of a capacitor. For example, the area of the capacity can be increased or a capacitor dielectric layer with a higher dielectric constant can be used so that the quantity of electric charges stored inside the capacitor is increased. Hence, a metal-insulator-metal (MIM) structure with a high dielectric constant (high k) insulation layer may become the mainstream DRAM capacitor in the next generation. Although using a metal electrode has the advantage of a lower dielectric response, but increasing the surface area of the metal electrode is not so easy. As a result, an innovative storage capacitor structure and manufacturing method thereof capable of maintaining a definite capacitance despite a reduction in the area occupied by the storage capacitor is researched so that the semiconductor devices can have a higher level of integration.